The present invention relates to a method for fabricating a semiconductor device which uses, in fabrication process steps of the semiconductor device, a layered film made of two or more types of oxide films which differ in their film qualities. The present invention more particularly relates to a selective wet etching of the layered film.
Recently, in VLSI devices configured by integrating a large number of elements, miniaturization of the elements has progressed in accordance with the technical trend toward smaller size, higher density, higher speed, lower power consumption and the like of the devices. With the progress in miniaturization of elements, thinning of a coating film constituting each element and miniaturization of each part of the element are approaching the utmost limit. In such circumstances, local thickness reduction of the coating film and unexpected change in shape of each part of the element cannot be ignored in order to maintain the desired properties of the element. Above all, when a multi-layered film is subjected to a wet etching process, it is important to control the etching selectivities of respective films in the multi-layered film. For example, in a fabrication process of VLSIs including MIS transistors, the process steps of forming sidewalls on the sides of a gate electrode are as follows: By a low pressure CVD method of reacting oxygen or ozone with tetra-ethyl-orso-silicate (referred hereinafter to as TEOS) which is a material of the sidewalls, a single-layered film made of silicon dioxide (referred hereinafter to as a TEOS film) is deposited; Subsequently, the TEOS film is selectively etched by an etch-back method, thereby forming the desired sidewalls on the sides of the gate electrode.
As elements such as MIS transistors become smaller and the spaces between gate electrodes of the elements become narrower, however, the above-mentioned conventional technique for forming a coating film may not ensure the gap-filling capability of an interlayer dielectric film.
To cope with the above problem, the process described below has been adopted. First, a silicon dioxide (SiO2, referred hereinafter to as NSG) film is deposited on the top and sides of a gate electrode by an atmospheric pressure CVD (referred hereinafter to as APCVD) method. Next, a silicon nitride (Si3N4, referred hereinafter to as SiN) film is deposited on the NSG film by a low pressure CVD (referred hereinafter to as LPCVD) method, and a boro-phospho-silicate glass (referred hereinafter to as BPSG) film or a phospho-silicate glass (referred hereinafter to as PSG) film is then deposited on the SiN film by the APCVD method. The deposited films are etched back, thereby forming sidewalls made of a multi-layered film with a BPSG or PSG/SiN/NSG film structure on the sides of the gate electrode. Accordingly, multi-layered-film sidewalls are obtained which have a structure in which a BPSG (or PSG) film with sectoral cross section is layered on a double-layered film made of NSG and SiN films with substantially L-shaped cross section. Thereafter, the multi-layered-film sidewalls are used as a mask for ion implanting to carry out an ion implantation step for the formation of source and drain regions. Then, in order to widen the space between gate electrodes, the BPSG or PSG films of the multi-layered-film sidewalls are removed selectively by vapor hydrogen fluoride (HF) etching. As a result, only the double-layered film made of NSG and SiN films with substantially L-shaped cross section remains on the sides of the gate electrode, and hence, a wide space is left between the gate electrodes. Accordingly, this process can ensure gap-fill capability of an interlayer dielectric film which will be buried between the gate electrodes.
The above-mentioned selective etching of the BPSG (PSG) film by vapor HF etching makes use of the critical concentration of HF for reaction (critical HF concentration for reaction) which varies with the moisture content in an oxide film as a parameter. That is, an oxide film is etched with HF of higher concentration than its critical HF concentration for reaction generally but not etched with HF of lower concentration than its critical HF concentration for reaction. Furthermore, the critical HF concentration for reaction differs depending upon the type of oxide film. Therefore, by vapor-etching the multi-layered film with HF having a concentration higher than the critical HF concentration for reaction with respect to the BPSG (or PSG) film and lower than the critical HF concentration for reaction with respect to the NSG film, only the BPSG (or PSG) film with sectoral cross section can be removed selectively without etching the almost entire NSG film of substantially L-shape. In addition, the etching selectivity of an oxide film with respect to a SiN film is high, and hence the substantially L-shaped SiN film is hardly etched.
For an oxide film exposed to an atmosphere of the dry-etching process or the ion implantation process, however, so-called process damage to its surface layer is caused. The oxide film having such process damage may be etched with HF having a concentration which is lower than its critical HF concentration for reaction and at which a normal oxide film would not be etched.
Accordingly, even if only a BPSG (or PSG) film of multi-layered-film sidewalls is intended to be selectively removed by vapor HF etching, the surface of a substantially L-shaped NSG film might be removed at the same time.
FIG. 3(a) is a cross sectional view illustrating the shapes of double-layered-film sidewalls after vapor HF etching is carried out according to the conventional process. As shown in FIG. 3(a), due to HF with a lower concentration than the proper critical HF concentration for reaction with respect to an NSG film, the side etching of the NSG film occurs at its damaged portion. This involves the inconvenience that a sufficient etching selectivity of a BPSG (or PSG) film cannot be obtained with respect to an NSG film, and therefore it is difficult to obtain sidewalls of desired shape.
Such an inconvenience might occur not only between BPSG and NSG films but also between a BPSG film and a thermally-oxidized silicon film (thxe2x80x94SiO2 film), constituting an isolation region (for example, LOCOS) and the like.
Further, when the removal of the BPSG (or PSG) film is made by wet etching with commonly used hydrofluoric acid or buffered hydrogen fluoride, change in etching rate of an oxide film depending upon the existence of process damage is smaller as compared with the vapor HF etching mentioned above. However, hydrofluoric acid and buffered hydrogen fluoride originally have small etching selectivity with respect to different types of oxide film, and then the removal of the entire BPSG (or PSG) film causes an increased amount of side etch of the NSG film.
Moreover, the above-mentioned wet etching using hydrofluoric acid or buffered hydrogen fluoride may cause stains on the surface of a silicon layer such as a silicon substrate or a polysilicon member if the silicon layer is exposed. In addition, if the silicon layer is exposed to an atmosphere including cobalt (Co) or titanium (Ti) in the subsequent step such as the step of forming a barrier metal film, a Co film or a Ti film is deposited on the stains. As a result, silicide reaction on the surface portion of the Si substrate is inhibited, whereby the semiconductor may be defective.
Therefore, an object of the present invention is, in the selective etching of either of two types of oxide films which differ in their film qualities, such as an NSG film and a BPSG film, to maintain proper thickness, shape and the like of oxide films in an element by taking measures for preventing etching selectivity from deteriorating due to process damage, for example.
Specifically, a first method for fabricating a semiconductor device of the present invention is directed to a fabrication process of a semiconductor device having a MIS transistor provided with a gate insulating film on a semiconductor substrate and a gate electrode on the film, and includes the steps of: (a) forming, on the sides of the gate electrode, sidewalls including a first oxide film and a second oxide film which have different etching properties; (b) implanting ions for forming source and drain regions using the sidewalls as a mask; and (c) selectively removing the second oxide film by etching the sidewalls with a mixed solution containing hydrofluoric acid and an organic solution.
With this method, by etching the oxide films with the mixed solution of high etching selectivity containing hydrofluoric acid and the organic solution, the first oxide film, which should be avoided from being etching, can be reduced in its etched amount.
In the step (a), an NSG film, a TEOS film or a plasma oxide film is formed as the first oxide film, and a BPSG film, a PSG film or a BSG film is formed as the second oxide film. By making use of the fact that the mixed solution containing hydrofluoric acid and the organic solution has high etching selectivity of the BPSG film or the PSG film with respect to the NSG film, the TEOS film or the plasma oxide film, the step (a) can surely reduce the etched amount of the first oxide film.
In the step (c), the mixed solution is preferably a solution having a mixture ratio defined by 0.1 to 5.0 weight percent of hydrofluoric acid, 0.1 to 5.0 weight percent of water and the remaining weight percent of acetic acid, or a solution having a mixture ratio defined by 0.1 to 5.0 weight percent of hydrofluoric acid, 0.1 to 5.0 weight percent of water and the remaining weight percent of isopropyl alcohol.
The present invention can be applied for any case where the gate electrode is formed of polysilicon, polymetal or metal.
The method further includes the step of cleaning the substrate with a hydrogen peroxide solution or an ozone solution after the step (c) and before a drying step. As a result, a stable chemical oxide film is formed on the surface of the substrate, and the occurrence of stains is suppressed.
In this case, the hydrogen peroxide concentration in the hydrogen peroxide solution is preferably in the range of 0.01 to 30.0 weight percent, while the ozone concentration in the ozone solution is preferably in the range of 0.1 to 150.0 ppm.
The step (a) includes the sub-steps of: forming the first oxide film on the top and sides of the gate electrode; forming a nitride film on the first oxide film; forming the second oxide film on the nitride film; and etching back the second oxide film to form layered-film sidewalls constituted of a double-layered film made of the first oxide and nitride films substantially in L-shaped section and the second oxide film in sectoral section. Further, in the step (c), double-layered-film sidewalls made of the first oxide and nitride films substantially in L-shaped section are formed on the sides of the gate electrode. By these steps, even if a MIS transistor is further miniaturized, it is possible to keep a sufficient space between the gate electrodes and to ensure the gap filling of the interlayer dielectric film.
A second method for fabricating a semiconductor device of the present invention includes the steps of: (a) forming, on a subsurate, a layered film including two types of oxide films which differ in their etching properties; and (b) selectively removing the layered film by selective etching with a mixed solution containing hydrofluoric acid and an organic solution. Further in the step (b), the etching selectivity of one of the two oxide films with respect to the other is increased using the mixed solution.
With this method, by etching the layered film with the mixed solution of high etching selectivity containing hydrofluoric acid and the organic solution, the first oxide film, which should be avoided from being etched, can be reduced in its etched amount.
In the step (b), the mixed solution is preferably a solution having a mixture ratio defined by 0.1 to 5.0 weight percent of hydrofluoric acid, 0.1 to 5.0 weight percent of water and the remaining weight percent of acetic acid, or a solution having a mixture ratio defined by 0.1 to 5.0 weight percent of hydrofluoric acid, 0.1 to 5.0 weight percent of water and the remaining weight percent of isopropyl alcohol.
A third method for fabricating a semiconductor device of the present invention is directed to a fabrication process of fabricating a semiconductor device having a MIS transistor, and includes the steps of: (a) forming a gate oxide film on a surface of a semiconductor substrate; (b) forming a gate electrode on the gate oxide film with almost all the gate oxide film left; (c) forming, on the sides of the gate electrode, sidewalls including an oxide film with different etching properties from the gate oxide film and removing exposed portion of the gate oxide film; (d) implanting ions for forming source and drain regions using the sidewalls as a mask; (e) etching the sidewalls with a mixed solution containing hydrofluoric acid and an organic solution; and (f) cleaning the semiconductor substrate with a hydrogen peroxide solution or an ozone solution after the step (e).
With this method, by etching the oxide films with the mixed solution of high etching selectivity containing hydrofluoric acid and an organic solution, the first oxide film, which should be avoided from being etched, can be reduced in its etched amount. Moreover, when the surface of the semiconductor substrate is exposed in the step (e), a stable chemical oxide film can be formed on the surface, and the occurrence of stains can be suppressed.
In the step (f), the hydrogen peroxide concentration in the hydrogen peroxide solution is preferably selected in the range of 0.01 to 30.0 weight percent, while the ozone concentration in the ozone solution is preferably selected in the range of 0.1 to 150.0 ppm.